Abstract:
The aim of this paper is to establish a fabrication process for non-volatile memory (NVM) transistors using ZnO nanoparticles, polymethylsilsesquioxane (PMSSQ) and soluble pentacene. ZnO nanoparticles mixed into the PMSSQ solution are used to create a nanocomposite layer for charge trapping in the NVM. It has been demonstrated that the nanocomposite layer in a metal–insulator–semiconductor structure can cause a hysteresis of ~6 V in a capacitance–voltage (C–V) plot, indicating a significant charge trapping capability. A threshold voltage shift of ~2.3 V between a programmed and erased NVM transistor and a carrier mobility of ~0.002 cm2/V-s are achieved. At present the fabricated NVMs have a limited life cycle of 4 program/erase cycles.