Abstract:
Industrial automation systems are used to perform different manufacturing processes using appropriate control systems. Examples include wide ranging applications in power-systems (smart grids), conveyor systems (baggage handling systems), and industrial robots (robotic arms). The correctness of these systems intertwines both functional and timing correctness. For example, load adjustments (functional property) on a smart grid would be useless if the automation system did not complete within the specified timing bound (timing property). Therefore, industrial automation systems are inevitably real-time in nature. However, in current design practice the timing behavior is considered secondary and such requirements are introduced very late in the design cycle. Hence, many failures related to timing have been reported in literature. To address this, we developed an approach for the design of Precision Timed Industrial Automation (PTIA) systems, where time is considered as a “first class citizen”. Our approach is inspired by the recent Precision Timed (PRET) philosophy approach for embedded systems. This thesis makes the following proposals and associated contributions for the design of PTIA systems: (1) We propose a Model Driven Engineering (MDE) approach for PTIA. We adopt the recently proposed IEC 61499 standard for the specification of automation systems and develop a model driven approach for compilation and deployment. To the best of our knowledge, this is the first known MDE approach that achieves precision timing. (2) We developed time-predictable design patterns and semantics for IEC 61499. The proposed design patterns aid the designers in developing time-predictable centralized, as well as, distributed IEC 61499 systems. The design patterns are backed by formal semantics that guarantee determinism and reactivity. To the best of our knowledge, the proposed semantics, is the only known formal semantics for IEC 61499 that facilitates precision timed implementations on both centralized and distributed settings. (3) We developed custom architectures / platforms for future Programmable Automation Controllers (PACs) / Programmable Logic Controllers (PLCs) to be used for PTIA systems. The developed PRET-PAC combines a soft-core processor with a custom designed memory to achieve time predictable execution. To the best of our knowledge, the developed PRET-PAC is the first proposal for a future PAC that is ideal for the design of PTIA systems. (4) We developed several approaches for automated static analysis of IEC 61499 function blocks over the PRET-PAC. The proposed analysis consists of a very precise analyzer using the CBMC model checker that offers precise results at the expense of scalability. To enable scalability, we also developed an approach based on Integer Linear Programming (ILP) that offers excellent scalability but lacks precision. ILP has been the approach of choice for timing analysis of industry grade embedded systems. Due to these two contrasting approaches, we developed a novel approach for timing analysis of function blocks that offers relatively scalable timing analysis while offering much improved precision compared to ILP. The new approach, called reachability, has been compared with model checking and ILP to prove its relative superiority. To the best of our knowledge, this thesis lays the foundations for the development of scalable timing analysis of IEC 61499 specifications for the first time.