Experimental Evaluation of Task Scheduling Accuracy: Implications for the Scheduling Model

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dc.contributor.author Sinnen, Oliver en
dc.contributor.author Sousa, L en
dc.date.accessioned 2016-09-05T06:49:25Z en
dc.date.issued 2003-09-01 en
dc.identifier.citation Institute of Electronics, Information and Communication Engineers, 2003, E86-D(9), pp. 1620 - 1627 en
dc.identifier.issn 0916-8532 en
dc.identifier.uri http://hdl.handle.net/2292/30222 en
dc.description.abstract Most heuristics for the task scheduling problem employ a simple model of the target system, assuming fully connected processors, a dedicated communication subsystem and no contention for communication resources. A small number of algorithms is aware of the contention, using an undirected graph model of the communication network. Although, many scheduling algorithms have been compared in the literature, little is known about the accuracy and appropriateness of the employed models. This article evaluates the accuracy of task scheduling algorithms on generic parallel systems. The performed experiments show a significant inaccuracy of the schedules produced. In an extensive analysis, the reasons for these results are identified and the implications for the scheduling model are discussed. en
dc.description.uri http://search.ieice.org/bin/index.php?category=D&lang=E&curr=1 en
dc.publisher Institute of Electronics, Information and Communication Engineers en
dc.relation.ispartofseries IEICE Transactions on Information and Systems en
dc.rights Items in ResearchSpace are protected by copyright, with all rights reserved, unless otherwise indicated. Previously published items are made available in accordance with the copyright policy of the publisher. Details obtained from http://www.sherpa.ac.uk/romeo/issn/0916-8532/ en
dc.rights.uri https://researchspace.auckland.ac.nz/docs/uoa-docs/rights.htm en
dc.title Experimental Evaluation of Task Scheduling Accuracy: Implications for the Scheduling Model en
dc.type Journal Article en
pubs.issue 9 en
pubs.begin-page 1620 en
pubs.volume E86-D en
dc.rights.holder Copyright: Institute of Electronics, Information and Communication Engineers en
pubs.author-url http://search.ieice.org/bin/summary.php?id=e86-d_9_1620&category=D&year=2003&lang=&abst= en
pubs.end-page 1627 en
pubs.publication-status Published en
dc.rights.accessrights http://purl.org/eprint/accessRights/RestrictedAccess en
pubs.subtype Article en
pubs.elements-id 51545 en
pubs.org-id Engineering en
pubs.org-id Department of Electrical, Computer and Software Engineering en
dc.identifier.eissn 1745-1361 en
pubs.record-created-at-source-date 2010-09-01 en


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