dc.contributor.author |
Lu, Q |
en |
dc.contributor.author |
Fan, J |
en |
dc.contributor.author |
Sham, Chiu Wing |
en |
dc.contributor.author |
Tam, WM |
en |
dc.contributor.author |
Lau, FCM |
en |
dc.date.accessioned |
2017-05-14T23:56:07Z |
en |
dc.date.issued |
2016-01 |
en |
dc.identifier.citation |
IEEE Transactions on Circuits and Systems I: Regular Papers 63(1):134-145 Jan 2016 |
en |
dc.identifier.issn |
1549-8328 |
en |
dc.identifier.uri |
http://hdl.handle.net/2292/32894 |
en |
dc.description.abstract |
Abstract: In this paper, we propose a new class of quasi-cyclic low-density parity-check (QC-LDPC) codes, namely cyclically-coupled QC-LDPC (CC-QC-LDPC) codes, and their RAM-based decoder architecture. CC-QC-LDPC codes have a simple structure and are constructed by cyclically-coupling a number of QC-LDPC subcodes. They can achieve throughput and error performance as excellent as LDPC convolutional codes, but with much lower hardware requirements. They are therefore promising candidates for future generations of communication systems such as long-haul optical communication systems. In particular, a rate-5/6 CC-QC-LDPC decoder has been implemented onto a field-programmable gate array (FPGA) and it achieves a throughput of 3.0 Gb/s at 100 MHz clock rate with 10-iteration decoding. No error floor is observed up to an Eb/N0 of 3.50 dB, where all 1.14×1016 transmitted bits have been decoded correctly. |
en |
dc.publisher |
Institute of Electrical and Electronics Engineers |
en |
dc.relation.ispartofseries |
IEEE Transactions on Circuits and Systems I: Regular Papers |
en |
dc.rights |
Items in ResearchSpace are protected by copyright, with all rights reserved, unless otherwise indicated. Previously published items are made available in accordance with the copyright policy of the publisher. |
en |
dc.rights.uri |
https://researchspace.auckland.ac.nz/docs/uoa-docs/rights.htm |
en |
dc.title |
A 3.0 Gb/s Throughput Hardware-Efficient Decoder for Cyclically-Coupled QC-LDPC Codes |
en |
dc.type |
Journal Article |
en |
dc.identifier.doi |
10.1109/TCSI.2015.2510619 |
en |
pubs.issue |
1 |
en |
pubs.begin-page |
134 |
en |
pubs.volume |
63 |
en |
dc.rights.holder |
Copyright: Institute of Electrical and Electronics Engineers |
en |
pubs.end-page |
145 |
en |
dc.rights.accessrights |
http://purl.org/eprint/accessRights/RestrictedAccess |
en |
pubs.subtype |
Article |
en |
pubs.elements-id |
609395 |
en |
pubs.org-id |
Science |
en |
pubs.org-id |
School of Computer Science |
en |
pubs.record-created-at-source-date |
2017-05-03 |
en |