dc.contributor.author |
Maier, JF |
en |
dc.contributor.author |
Wynn, David |
en |
dc.contributor.author |
Biedermann, W |
en |
dc.contributor.author |
Lindemann, U |
en |
dc.contributor.author |
Clarkson, PJ |
en |
dc.date.accessioned |
2017-10-01T22:58:10Z |
en |
dc.date.issued |
2014-10 |
en |
dc.identifier.citation |
Research in Engineering Design 25(4):283-307 Oct 2014 |
en |
dc.identifier.issn |
1435-6066 |
en |
dc.identifier.uri |
http://hdl.handle.net/2292/35824 |
en |
dc.description.abstract |
Design tasks need to be rescheduled and reprioritised frequently during product development. Inappropriate priority decisions generate rework; thus, the policy used to guide such decisions may have a significant effect on design cost and lead time. Generic priority rules provide easily implementable guidelines for task prioritisation and are theoretically effective for many planning problems. But can they be used in design processes, which include iteration, rework and changes? In this article, a discrete-event simulation model is developed to investigate priority policies in design. The model explores the combined effects of progressive iteration, rework and change propagation during design of interconnected parts in a product architecture. Design progression is modelled as an increase in the maturity of parts; rework and change propagation cause maturity levels in certain parts to reduce. Twelve product architecture models ranging in size from 7 to 32 elements are simulated to draw qualitative and general insights. Sensitivity of the findings to assumptions and model inputs is tested. Generally effective priority policies are identified, and their impact is shown to depend on the interconnectedness and organisation of product architecture, as well as the degree of concurrency in the design process. |
en |
dc.publisher |
Springer Verlag |
en |
dc.relation.ispartofseries |
Research in Engineering Design |
en |
dc.rights |
Items in ResearchSpace are protected by copyright, with all rights reserved, unless otherwise indicated. Previously published items are made available in accordance with the copyright policy of the publisher. Details obtained from http://www.sherpa.ac.uk/romeo/issn/0934-9839/ |
en |
dc.rights.uri |
https://researchspace.auckland.ac.nz/docs/uoa-docs/rights.htm |
en |
dc.rights.uri |
https://creativecommons.org/licenses/by/4.0/ |
en |
dc.title |
Simulating progressive iteration, rework and change propagation to prioritise design tasks |
en |
dc.type |
Journal Article |
en |
dc.identifier.doi |
10.1007/s00163-014-0174-8 |
en |
pubs.issue |
4 |
en |
pubs.begin-page |
283 |
en |
pubs.volume |
25 |
en |
dc.description.version |
VoR - Version of Record |
en |
dc.rights.holder |
Copyright: The author |
en |
pubs.end-page |
307 |
en |
pubs.publication-status |
Published |
en |
dc.rights.accessrights |
http://purl.org/eprint/accessRights/OpenAccess |
en |
pubs.subtype |
Article |
en |
pubs.elements-id |
489962 |
en |
pubs.org-id |
Engineering |
en |
pubs.org-id |
Mechanical Engineering |
en |
dc.identifier.eissn |
1435-6066 |
en |
pubs.record-created-at-source-date |
2017-10-02 |
en |
pubs.online-publication-date |
2014-10 |
en |