dc.contributor.advisor |
Professor Zoran Salcic |
en |
dc.contributor.advisor |
Associate Professor Grant Covic |
en |
dc.contributor.advisor |
Dr George Coghill |
en |
dc.contributor.author |
Savage, Matthew James Waipurukuma. |
en |
dc.date.accessioned |
2009-07-23T02:33:46Z |
en |
dc.date.available |
2009-07-23T02:33:46Z |
en |
dc.date.issued |
2009 |
en |
dc.identifier.citation |
Thesis (PhD--Electrical and Electronic Engineering)--University of Auckland, 2008. |
en |
dc.identifier.uri |
http://hdl.handle.net/2292/4523 |
en |
dc.description.abstract |
Design tools of ever increasing power are required to keep pace with technological
improvements in chip production. Chip capacities continually increase meaning that designs
previously unfeasible become feasible. These designs are typically more complex and larger
than their predecessors. Usually, the time available to a designer does not increase at the
same rate. A designer is therefore tasked with a greater work load and a very limited amount
of time. Design tools and automation are therefore necessary to compensate for this
situation.
The limiting characteristics of a design tool are its ease of use, the range of systems it can be
applied to, and the quality of results obtained. Should a design tool lack in any of these three
areas it will be of limited benefit. This work addresses only the quality of results obtained.
While the other two are essential, they are unlikely to be relevant to a design tool if that tool
is not adopted because the results were of insufficient quality.
A design framework is proposed for the digital design of systems on FPGAs. This framework
sets out the processes for producing a system specification of the design problem
encountered, and then gives a procedure for processing that specification to produce a set of
pareto-optimal designs in VHDL to implement the specification. The actual mapping of a
specification to a VHDL design, is held in a mapping string that allows optimisation to be
separated from other stages in the design framework.
A new genetic algorithm, the Adaptive Speciation Genetic Algorithm (ASGA), is proposed
featuring a customised selection, crossover, and mutation operator. This algorithm is
assessed against other genetic algorithms from the literature on a knapsack problem and
three digital design case studies. These case studies were the design of a parameter
estimation circuit for a Self-Tuning Regulator (STR), the design of a Sum-of-Absolute-
Difference (SAD) function for video motion detection problems, and the design of a five state
Extended Kalman Filter (EKF). Results indicated that ASGA had good performance in all
these problems.
Through tests against other genetic algorithms, it was found the ASGA’s selection operator
was inferior in some cases to that of the Pareto Envelope Selection Algorithm (PESA) by
3
Corne et al. By incorporating the selection operator of PESA performance improvements
could be gained in the EKF problem. |
en |
dc.language.iso |
en |
en |
dc.publisher |
ResearchSpace@Auckland |
en |
dc.relation.ispartof |
PhD Thesis - University of Auckland |
en |
dc.relation.isreferencedby |
UoA1907758 |
en |
dc.rights |
Items in ResearchSpace are protected by copyright, with all rights reserved, unless otherwise indicated. |
en |
dc.rights.uri |
https://researchspace.auckland.ac.nz/docs/uoa-docs/rights.htm |
en |
dc.rights.uri |
http://creativecommons.org/licenses/by-nc-sa/3.0/nz/ |
en |
dc.subject |
genetic algorithm |
en |
dc.subject |
digital design |
en |
dc.subject |
FPGA |
en |
dc.title |
A design framework and genetic algorithm for digital design optimisation on FPGAs |
en |
dc.type |
Thesis |
en |
thesis.degree.discipline |
Electrical and Electronic Engineering |
en |
thesis.degree.grantor |
The University of Auckland |
en |
thesis.degree.level |
Doctoral |
en |
thesis.degree.name |
PhD |
en |
dc.subject.marsden |
Fields of Research::280000 Information, Computing and Communication Sciences::280200 Artificial Intelligence and Signal and Image Processing::280212 Neural networks, genetic algorithms and fuzzy logic |
en |
dc.subject.marsden |
Fields of Research::290000 Engineering and Technology |
en |
dc.rights.holder |
Copyright: The author |
en |
pubs.local.anzsrc |
0906 - Electrical and Electronic Engineering |
en |
pubs.org-id |
Faculty of Engineering |
en |
dc.identifier.wikidata |
Q112882325 |
|