Accelerating SuperBE with Hardware/Software Co-design

Show simple item record Chen, Andrew en Gupta, R en Borzenko, A en Wang, Kevin I-Kai en Biglari-Abhari, Morteza en 2019-03-11T21:09:02Z en 2018-08-18 en
dc.identifier.citation Journal of Imaging 4(10):17 pages 18 Aug 2018 en
dc.identifier.uri en
dc.description.abstract Background Estimation is a common computer vision task, used for segmenting moving objects in video streams. This can be useful as a pre-processing step, isolating regions of interest for more complicated algorithms performing detection, recognition, and identification tasks, in order to reduce overall computation time. This is especially important in the context of embedded systems like smart cameras, which may need to process images with constrained computational resources. This work focuses on accelerating SuperBE, a superpixel-based background estimation algorithm that was designed for simplicity and reducing computational complexity while maintaining state-of-the-art levels of accuracy. We explore both software and hardware acceleration opportunities, converting the original algorithm into a greyscale, integer-only version, and using Hardware/Software Co-design to develop hardware acceleration components on FPGA fabric that assist a software processor. We achieved a 4.4× speed improvement with the software optimisations alone, and a 2× speed improvement with the hardware optimisations alone. When combined, these led to a 9× speed improvement on a Cyclone V System-on-Chip, delivering almost 38 fps on 320 × 240 resolution images. en
dc.publisher MDPI en
dc.relation.ispartofseries Journal of Imaging en
dc.rights Items in ResearchSpace are protected by copyright, with all rights reserved, unless otherwise indicated. Previously published items are made available in accordance with the copyright policy of the publisher. en
dc.rights.uri en
dc.rights.uri en
dc.title Accelerating SuperBE with Hardware/Software Co-design en
dc.type Journal Article en
dc.identifier.doi 10.3390/jimaging4100122 en
pubs.issue 10 en
pubs.volume 4 en
dc.rights.holder Copyright: The authors en en
dc.rights.accessrights en
pubs.subtype Article en
pubs.elements-id 755150 en Engineering en Department of Electrical, Computer and Software Engineering en
dc.identifier.eissn 2313-433X en
pubs.record-created-at-source-date 2018-10-22 en

Files in this item

Find Full text

This item appears in the following Collection(s)

Show simple item record


Search ResearchSpace