Abstract:
The dissertation proposes a method of phasor estimation, having an infinitesimal computational burden, zero overshoot, and customizability. The mathematical principle behind the method is described and discussed. The causes of errors are discussed, and the parameter selection procedure is introduced to minimize errors and to adjust algorithm performance according to different application requirements. The proposed method has been discussed and compared in all details with ipDFT and FIR filter using a Flat-top windowing function, both under selected situations, and the static and dynamic situations given by the IEC/IEEE 60255-188-1. Additionally, the major advantages of the proposed frequency estimation method compared with the conventional FIR filter-based method using the derivative of angular position are presented in AM tests. It can be concluded that this method becomes a substitute for ipDFT in most cases, and shows three advantages compared with the Flat-top FIR method, 1) zeros overshoot, 2) customizability, and 3) no extra delays on frequency estimates.
Hardware implementation is divided into 5 parts, power supply, signal conditioning, a GPS disciplined oscillator, a computing unit, and cost analysis. Apart from the power supply circuit, all other blocks are tested or simulated to check the performance. The expenditures on building the proposed prototype of the micro-PMU are a dozen times lower than the commercial micro-PMUs in the market.
This dissertation also reviews PMUs based applications at a distribution level. D-PMU based applications are summarized and compared from different perspectives. The inter-relations between the existing publication topic areas from the D-PMU perspective are drawn. Finally, the current situation and the future direction of scientific research related to D-PMU are discussed.
