Abstract:
Processors are not getting faster but wider and more parallel, thus developers must work even harder to extract performance gains. An alternative computing paradigm is to use FPGA technology to create a reconfigurable computing environment–where both software and hardware are variable and can be re-configured. This approach has the potential to realise substantial performance gains in a wide gamut of applications, however it is also a daunting task as applications require hardware development to harness the benefits. In this research the acceleration of common data structures, using the priority queue as a case study, has been explored in the context of a reconfigurable computing environment. A Java-based hybrid hardware/software priority queue (PQ) has been implemented that is a drop-in replacement for a software PQ as it adheres strictly to the same programming interface as conventional software implementations. The accelerated PQ has demonstrated up to 3x speedup when running a minimum spanning tree graph computation. A suite of accelerated data structures represents an attractive way for developers to harness the potential of reconfigurable computing in the future across a wide gamut of application domains.