Dinneen, MJHua, R2023-01-242023-01-242022CDMTCS Research Reports CDMTCS-567 (2022)1178-3540https://hdl.handle.net/2292/62561In this paper, we investigate graph embeddings of large cliques into the existing D-Wave quantum architectures (Chimera, Pegasus) when physical qubits or couplers have faults. The motivation for pre-computing large clique embeddings allows for easier embeddings (without extensive classical computation) of arbitrary logical qubit interaction graphs (e.g. QUBO graphs) when performing quantum annealing on the restricted topologies of the existing D-Wave quantum architectures. To investigate the performance and scalability of existing hardware topology (Pegasus graph), we propose a method for simulating large hardware graphs with random faulty compo- nents and compare the performance of di erent embedding techniques on these graphs.Items in ResearchSpace are protected by copyright, with all rights reserved, unless otherwise indicated. Previously published items are made available in accordance with the copyright policy of the publisher.https://researchspace.auckland.ac.nz/docs/uoa-docs/rights.htmEfficient Clique Embedding with Faulty Hardware ComponentsTechnical ReportFields of ResearchCopyright: The author(s)http://purl.org/eprint/accessRights/OpenAccess